1. Field of the Invention
The present invention relates to a multilayer ceramic substrate, a method for producing a multilayer ceramic substrate, and an electronic component including a multilayer ceramic substrate. In particular, the present invention relates to an improvement in the strength of a multilayer ceramic substrate.
2. Description of the Related Art
A multilayer ceramic substrate in the related art is described in, for example, Japanese Unexamined Patent Application Publication No. 6-29664. Japanese Unexamined Patent Application Publication No. 6-29664 discloses a low-temperature co-fired multilayer ceramic substrate including glass and a crystalline material, in which the outermost layers have a thermal expansion coefficient less than the inner layers, and in which the total thickness of the outermost layers arranged on both sides of the substrate is less than the thicknesses of the inner layers. Japanese Unexamined Patent Application Publication No. 6-29664 discloses that the use of such a structure generates compressive stresses in the outermost layers during a cooling step after firing, thereby improving the transverse strength of the multilayer ceramic substrate.
However, the multilayer ceramic substrate described in Japanese Unexamined Patent Application Publication No. 6-29664 has the problems described below.
Simply increasing the thermal expansion coefficient between the outermost layers and the inner layers may increase the stress at the interfaces between the outermost layers and the inner layers, which can cause defects, such as delamination and voids, for example, at the interfaces. Japanese Unexamined Patent Application Publication No. 6-29664 discloses an example in which the difference in thermal expansion coefficient is about 0.4 ppmK−1 and an example in which the difference in thermal expansion coefficient is about 0.6 ppmK−1. The combination of the composition and the difference in thermal expansion coefficient in each example provides the effect claimed in Japanese Unexamined Patent Application Publication No. 6-29664. However, Japanese Unexamined Patent Application Publication No. 6-29664 fails to disclose any limitations on the difference in thermal expansion coefficient.
When using the structure described in Japanese Unexamined Patent Application Publication No. 6-29664, an increase in the difference in thermal expansion coefficient results in an increase in the stress at the interfaces between the outermost layers and the inner layers. If the bonding strength is insufficient at the interfaces, defects such as delamination and voids, for example, due to the stress may occur at the interfaces.
For a multilayer ceramic substrate, a smaller amount of curvature is preferable because the steps of mounting a component on the substrate and mounting the substrate on a motherboard can be performed with increased reliability. Where a component is mounted on or a resin coating is performed on a surface of the multilayer ceramic substrate, the shrinkage of solder, an adhesive, or the coating resin disadvantageously may cause warpage of the multilayer ceramic substrate. A comparison of the difference in thermal expansion coefficient between the outermost layers and the inner layers in the examples described in Japanese Unexamined Patent Application Publication No. 6-29664 and the case in which a difference is not provided shows no significant differences.